Example Network Device

Figure 1 illustrates an example network device 100 suitable for implementing the present invention. Network device 100 includes master central processing unit (CPU 104), interfaces 102, and bus 110 (e.g., a PCI bus). When acting under the control of appropriate software or firmware, CPU 104 is responsible for executing packet management, error detection, and/or routing functions, such as miscabling detection functions, for example. CPU 104 preferably accomplishes all these functions under the control of software including an operating system and any appropriate applications software. CPU 104 may include one or more processor(s) 163 such as a processor from the motorola family of microprocessors or the MIPS family of microprocessors. In an altetive embodiment, processor(s) 163 is specially designed hardware for controlling the operations of router 100. In a specific embodiment, memory 106 (such as non-volatile RAM and/or ROM) also forms part of CPU 104. However, there are many different ways in which memory could be coupled to the system. 

Interfaces 102 are typically provided as interface cards (sometimes referred to as “line cards”). Generally, they control the sending and receiving of data packets over the network and sometimes support other peripherals used with the router 100. Among the interfaces that may be provided are ethernet interfaces, frame relay interfaces, cable interfaces, DSL interfaces, token ring interfaces, and the like. In addition, various very high-speed interfaces may be provided such as fast token ring interfaces, wireless interfaces, ethernet interfaces, Gigabit Ethernet interfaces, ATM interfaces, HSSI interfaces, POS interfaces, FDDI interfaces and the like. Generally, these interfaces may include ports appropriate for communication with the appropriate media. In some cases, they may also include an independent processor and, in some instances, volatile RAM. The independent processors may controlsuch communications intensive tasks as packet switching, media control and management. By providing separate processors for the communications intensive tasks, these interfaces allow master microprocessorCPU 104 to efficiently perform routing computations, network diagnostics, security functions, etc. 

Although the system shown in Figure 1 is one specific network device of the present invention, it is by no means the only network device architecture on which the present invention can be implemented. For example, an architecture having a single processor that handles communications as well as routing computations, etc. is often used. Further, other types of interfaces and media could also be used with the router. 

Regardless of the network device’sconfiguration, it may employ one or more memories or memory modules (including memory 106) configured to store program instructions for the general-purpose network operations and mechanisms for roaming, route optimization and routing functions described herein. The program instructions may control the operation of an operating system and/or one or more applications, for example. The memory or memories may also be configured to store tables such as mobility binding, registration, and association tables, etc. 

Figure 2 illustrates a conventional system bus computing system architecture 200 wherein the components of the system are in electrical communication with each other using a bus 202. Example system 200 includes a processing unit (CPU or processor 204) and a systembus 202 that couples various system components including the system memory 214, such as read only memory (ROM 216) and random access memory (RAM 218), to the processor 204. The system 200 can include a cache of high-speed memory connected directly with, in close proximity to, or integrated as part of the processor 204. The system 200 can copy data from the memory 214 and/or the storage device 220 to the cache 206 for quick access by the processor 204. In this way, the cache can provide a performance boost that avoids processor 204delays while waiting for data. These and other modules can control or be configured to control the processor 204 to perform various actions. Other system memory 214 may be available for use as well. The memory 214 can include multiple different types of memory with different performance characteristics. The processor 204 can include any general purpose processor and a hardware module or software module, such as module 1 222, module 2 224, and module 3 226 stored in storage device 220, configured to control the processor 204 as well as a special-purpose processor where software instructions are incorporated into the actual processor design. The processor 204 may essentially be a completely self-contained computing system, containing multiple cores or processors, a bus, memory controller, cache, etc. A multi-core processor may be symmetric or asymmetric. 

To enable user interaction with the computing device 200, an input device 212 can represent any number of input mechanisms, such as a microphone for speech, a touch-sensitive screen for gesture or graphical input, keyboard, mouse, motioninput, speech and so forth. An output device 210 can also be one or more of a number of output mechanisms known to those of skill in the art. In some instances, multimodal systems can enable a user to provide multiple types of input to communicate with the computing device 200. The communications interface 240 can generally govern and manage the user input and system output. There is no restriction on operating on any particular hardware arrangement and therefore the basic features here may easily be substituted for improved hardware or firmware arrangements as they are developed. 

Storage device 220 is a non-volatile memory and can be a hard disk or other types of computer readable media which can store data that are accessible by a computer, such as magnetic cassettes, flash memory cards, solid state memory devices, digital versatile disks, cartridges, random access memories (RAM 218), read only memory (ROM 216), and hybrids thereof. 

The storage device 220 can include software modules 222, 224, 226 for controlling the processor 204. Other hardware or software modules are contemplated. The storage device 220 can be connected to the systembus 202. In one aspect, a hardware module that performs a particular function can include the software component stored in a computer-readable medium in connection with the necessary hardware components, such as the processor 204, bus 202, display 235, and so forth, to carry out the function. 

Figure 3 illustrates a computer system 300 having a chipset architecture that can be used in executing the described method and generating and displaying a graphical user interface (GUI). computer system 300 is an example of computer hardware, software, and firmware that can be used to implement the disclosed technology. System 300 can include a processor 304, representative of any number of physically and/or logically distinct resources capable of executing software, firmware, and hardware configured to perform identified computations. Processor 304 can communicate with a chipset 302 that can controlinput to and output from processor 304. In this example, chipset 302 outputs information to output device 310, such as a display, and can read and write information to storage device 312, which can include magnetic media, and solid state media, for example. Chipset 302 can also read data from and write data to RAM 314. A bridge 308 for interfacing with a variety of user interface components 306 can be provided for interfacing with chipset 302. Such user interface components 306 can include a keyboard, a microphone, touch detection and processing circuitry, a pointing device, such as a mouse, and so on. In general, inputs to system 300 can come from any of a variety of sources, machine generated and/or human generated. 

Chipset 302 can also interface with one or more communication interfaces 208 that can have different physical interfaces. Such communication interfaces can include interfaces for wired and wireless local area networks, for broadband wireless networks, as well as personal area networks. Some applications of the methods for generating, displaying, and using the GUI disclosed herein can include receiving ordered datasets over the physical interface or be generated by the machine itself by processor 304analyzing data stored in storage 312 or 314. Further, the machine can receive inputs from a user via user interface components 306 and execute appropriate functions, such as browsing functions by interpreting these inputs using processor 304.

It can be appreciated that example systems 200 and 300 can have more than one processor 204 or be part of a group or cluster of computing devices networked together to provide greater processing capability.